FPGA Design and Verification Engineer”

Job Description

Job Title: “FPGA Design and Verification Engineer”

Location – San Diego, CA-Onsite

Term: Contract And FTE

Job Description

10+ years experience in electronic design and verification, with hands-on experience in requirements specification, detailed design, verification plan, design validation and qualification deep knowledge of digital design fundamentals, including clock-domain-crossing (CDC)
strong competence of FPGA tooling including synthesis, building, timing analysis and simulation
experienced with architecting and coding FPGAs using VHDL,
experience with SystemVerilog and UVM framework proficiency a plus for verification hands-on experience with board, module and system level electronic troubleshooting, including
experience with engineering test equipment such as logic analyzers and bus analyzers
bash/perl/python scripting a big plus for verification, validation and process automation.
Knowledge of Makefile a plus, familiarity with Linux/Unix OS is needed knowledge of change management and revision control tools such as SVN or Git will be a plus -strong communication skills and ownership of solution space, including ability to author technical
specifications, and procedures and driving to completion with minimum oversight. – demonstrated ability to work in a process driven environment, with a structured problem-solving approach BSEE required, MSEE preferred
DUTIES AND RESPONSIBILITIES

Create FPGA requirement specifications from contributing flow down documents.
Generate test specifications to track and ensure functional specifications are fully met -Ability to work independently as well as communicate and work well within the FPGA team
Interact with other design groups such as software and controls to facilitate the design integration effort
Apply use of best design practices with a strong bias of what it takes to deliver highly reliable designs