Design Lead

Job Description

Responsibilities:
Solution team’s mission is to enable our partners by delivering a secure, performant, reliable hardware and software that are easy to use. Verification engineers will join a highly focused group where you will help verify our next generation compute solutions using innovative technologies, methodologies and tools.
As a verification engineer with a knowledge of subsystems and SoCs, you will make valuable contributions to a team tasked with verifying functional correctness of the design under test.
Key responsibilities will include building functional verification strategies, writing test plans, defining test methodologies, improving the verification methodologies, completing functional verification to the required quality levels and schedules.
Working with project management on planning tasks, setting schedules, quality checkpoints, engineer will be fully responsible for the area of verification.
Will collaborate with engineers from architecture, design, verification, implementation, modelling, performance analysis, silicon validation, FPGA and board development.
Senior engineers are also encouraged to support junior members.
Provide effective leadership helping the group leadership team to build and develop a diverse inclusive local design centre by hiring, mentoring, coaching and talent management.
Communicate clearly and effectively with peers, partners and groups across multiple fields
Required Skills and Experience :
8+ Years of Proven experience!
Worked on embedded C based SoC verification environments
Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.)
Experienced in one or more of various verification methodologies – UVM/OVM/eRM, formal, low power, emulation
Exposure to all stages of verification: requirements collection, creation of verification methodology plans, testplans, testbench implementation, Testcases development, coverage closure, documentation and support
Nice To Have” Skills and Experience :
You possess the knowledge of object-oriented programming concepts
Practical experience of working on Processor based system design!
Exposure to UVM or other industry standard verification methodologies
Languages: Verilog, C/C++, Assembly language, Perl
Verification Languages such as System Verilog.
Strong understanding of CPU Architecture/micro-architectures.
Should have team handling experience
Desirable skills
Strong understanding of basic computer architecture
Good in logical programming using C/C++/ Assembly with experience in embracing software engineering standard methodologies.
Familiar with verification process such as Test Plan development, Testcase development
Familiarity of Unix / Linux working environment